Scale By The Bay 2018: Yunsup Lee, Leveraging Scala to Build Hardware at Scale

Scale By the Bay 2019 is held on November 13-15 in sunny Oakland, California, on the shores of Lake Merritt: https://scale.bythebay.io. Join us!
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The hardware industry needs a fundamentally different approach to keep up with the new compute needs that are required for new applications such as IoT, edge computing, machine learning, and artificial intelligence. In an era where transistor scaling has stopped, the world will need lots of custom hardware to fulfill these new compute requirements. Unfortunately, increasing developer productivity has taken a back seat in the hardware industry. In this talk, I'll show how we're leveraging Scala to build hardware productively at a high-level. I'll present our full chip development stack, which is all written in Scala. The full chip stack consists of the Chisel hardware construction domain-specific language, the Diplomacy framework for parameter negotiation, and the FIRRTL compiler that turns Chisel circuits into Verilog netlists. With our full chip stack, a hardware engineer can express a complex modern SoC (system-on-chip) with less than 30 lines of statically type-checked Scala code!

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