SOC-Design Project 2 (Pong created with custom risk V Processor and AXI bus interface)

This project showcases the pong ip packaged and running on a custom Risk V Processor which interfaces with a custom, AXI GPIO bus. This bus is then programmed in C to create a "CPU" player to control the other paddle in the PONG game. On the right there is a screen from Putty along with the Vitis workspace, the screen from putty prints UART statements for debugging.

The entire project is programmed on an AMD Xilinx Urbana SOC FPGA.

Видео SOC-Design Project 2 (Pong created with custom risk V Processor and AXI bus interface) канала Sanat Konda (sskonda04)