RISC-V Technical Session | Programming RISC V Accelerators via Fortran

A range of RISC-V based accelerators are available and coming to market, and there is strong potential for these to be used for High Performance Computing (HPC) workloads as they can deliver performance, energy and cost benefits. However, such accelerators tend to provide bespoke programming models and APIs that require codes to be rewritten. In scientific computing, where many of the simulation code are highly complex and written in Fortran, this is not realistic. In this talk I will describe an approach we have been developing that, based on MLIR, enables driving such architectures via Fortran and common HPC programming models, delivering performance whilst avoiding code redevelopment.

Видео RISC-V Technical Session | Programming RISC V Accelerators via Fortran канала RISC-V International