AXI GPIO & Memory-mapped I/O (MMIO) : read/write to peripherals using a C pointer & control user I/O

Learn how to master AXI GPIO and memory mapped I/O on Zynq UltraScale+ devices in this tutorial!
This video walks you through creating a complete hardware-software project that demonstrates how to control peripherals from ARM cores using memory-mapped I/O. The Vitis application read the DIP switch in polling mode and controls the LED shift pattern.

In Part 1, you'll learn how to:
- Set up a Vivado block design with Zynq UltraScale+ IP
- Configure multiple AXI GPIO blocks for LED control and DIP switch input
- Implement a 32-bit adder in programmable logic that its ports connected to AXI GPIOs
- Review the "Address Editor" in Vivado, and compare it with "Addressing View" option in block design
- Generate and export hardware for Vitis

Part 2 covers the software implementation in Vitis, where you'll discover:
- How to use memory-mapped I/O with C pointers to access peripherals
- Working with Xil_Out32 and Xil_In32 functions for reading/writing to hardware
- Creating an interactive LED pattern controlled by DIP switches
- Understanding memory addressing and hardware abstraction

Here is the key topics:
00:01 Part 1: Vivado Design
01:59 Auto-connection in Vivado design
03:15 Memory Mapping & Addressing
04:06 I/O Planning & Bitstream Generation
05:12 Part 2: Vitis Software Design
05:49 Driver Code Overview
05:53 Address Definitions in C code
06:26 Understanding Xil_Out32/Xil_In32 functions
07:37 Practice with Adder Module Interface
08:08 DIP Switch Control Implementation
09:02 Demo & Testing
09:35 Final Results

You can find the C code in GitHub Repository:
https://github.com/FPGAPS/AXI-GPIO-memory-map

Видео AXI GPIO & Memory-mapped I/O (MMIO) : read/write to peripherals using a C pointer & control user I/O канала FPGAPS

AXI GPIO Memory Mapped IO C pointer Vitis Vivado LEDs Dip Switches User I/O Xil_In Xil_out Zynq UltraSclae+

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23 ноября 2024 г. 21:40:55

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