HDL Verilog Project | Vedic Multiplier (with code)| JDOODLE Online Compiler

In this Verilog project, a Vedic Multiplier has been implemented by a friend of mine Mr. Ayush Mahendru in Verilog HDL on an online compiler JDOODLE . Please do Like, Share and Subscribe for more such content.
Links -
Verilog Code -https://github.com/ayushmahendru03/hdl_8_bit

Other Projects-
►Traffic Light Controller in Verilog - https://youtu.be/Yt7no6rwCVk
►Round Robin Arbiter in Verilog - https://www.youtube.com/watch?v=X6oJn7r9-8s
►Vedic Multiplier in Verilog - https://www.youtube.com/watch?v=6M3nyyQfpHU
►Clock with Alarm in Verilog - https://www.youtube.com/watch?v=pTk1H50e8bI
►Washing Machine in Verilog - https://www.youtube.com/watch?v=iAoi9jTzxcI
►N bit Multiplier in Verilog - https://www.youtube.com/watch?v=lmzCdx6gkdU
►PWM Shift Register in Verilog - https://www.youtube.com/watch?v=Pz9sPflKpXc
►Vending Machine in Verilog - https://www.youtube.com/watch?v=tJc0blBDRzo
►Hexadecimal Keypad Scanner in Verilog - https://www.youtube.com/watch?v=Y1cp2kwos5M
►RAM - ROM Design in Verilog - https://youtu.be/m18YU9xjETU

Ayush's LinkedIn - https://www.linkedin.com/in/ayush-mahendru-5852a1199
Arjun's LinkedIn -https://www.linkedin.com/in/arjun-narula
Online Simulator - https://www.jdoodle.com/execute-verilog-online/

#verilog #verilogproject #arjunnarula #electronic

Видео HDL Verilog Project | Vedic Multiplier (with code)| JDOODLE Online Compiler канала Arjun Narula

#verilog #multiplier #project

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23 декабря 2021 г. 22:00:12

00:11:36

Arjun Narula

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